Search results for "Block size"

showing 4 items of 4 documents

Performance Evaluation of the IEEE 802.16 ARQ Mechanism

2007

The IEEE 802.16 technology defines the ARQ mechanism that enables a connection to resend data at the MAC level if an error is detected. In this paper, we analyze the key features and parameters of the ARQ mechanism. In particular, we consider a choice for the ARQ feedback type, a scheduling of the ARQ feedbacks and retransmissions, the ARQ block rearrangement, ARQ transmission window and ARQ block size. We run a number of simulation scenarios to study these parameters and how they impact a performance of application protocols. The simulation results reveal that the ARQ mechanism plays an important role in transmitting data over wireless channels in the IEEE 802.16 networks.

IEEE 802Computer sciencebusiness.industryComputerSystemsOrganization_COMPUTER-COMMUNICATIONNETWORKSHybrid automatic repeat requestData_CODINGANDINFORMATIONTHEORYScheduling (computing)Selective Repeat ARQSliding window protocolApplication protocolWirelessbusinessBlock sizeComputer network
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Hardware Implementation of a Configurable Motion Estimator for Adjusting the Video Coding Performances

2012

International audience; Despite the diversity of video compression standard, the motion estimation still remains a key process which is used in most of them. Moreover, the required coding performances (bit-rate, PSNR, image spatial resolution, etc.) depend obviously of the application, the environment and the network communication. The motion estimation can therefore be adapted to fit with these performances. Meanwhile, the real time encoding is required in many applications. In order to reach this goal, we propose in this paper a hardware implementation of the motion estimator which enables the integer motion search algorithms to be modified and the fractional search and variable block siz…

Motion compensation[ INFO.INFO-TS ] Computer Science [cs]/Signal and Image Processingbusiness.industryComputer scienceReal-time computingEstimator020206 networking & telecommunications02 engineering and technology[ SPI.SIGNAL ] Engineering Sciences [physics]/Signal and Image processingQuarter-pixel motion[INFO.INFO-ES] Computer Science [cs]/Embedded Systems[INFO.INFO-TS]Computer Science [cs]/Signal and Image ProcessingMotion estimation0202 electrical engineering electronic engineering information engineering020201 artificial intelligence & image processing[INFO.INFO-ES]Computer Science [cs]/Embedded Systems[ INFO.INFO-ES ] Computer Science [cs]/Embedded SystemsField-programmable gate arraybusinessBlock size[SPI.SIGNAL]Engineering Sciences [physics]/Signal and Image processingComputer hardwareComputingMilieux_MISCELLANEOUSData compressionCoding (social sciences)
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Analysis and Performance Evaluation of the IEEE 802.16 ARQ Mechanism

2008

The IEEE 802.16 standard defines the ARQ mechanismas a part of the MAC layer. The functioning of the ARQmechanism depends on a number of parameters. The IEEE802.16 specification defines them but it does not provide concrete values and solutions. This paper studies the key features and parameters of the 802.16 ARQ mechanism. In particular, we consider a choice for the ARQ feedback type, an algorithm to build block sequences, the ARQ feedback intensity, a scheduling of the ARQ feedbacks and retransmissions, the ARQ block rearrangement, ARQ transmission window and the ARQ block size. We ran simulation scenarios to study these parameters and how they impact the performance of application protoc…

lcsh:Computer softwareIEEE 802Computer sciencebusiness.industryNS-2ComputerSystemsOrganization_COMPUTER-COMMUNICATIONNETWORKSData_CODINGANDINFORMATIONTHEORYKey featuresScheduling (computing)Selective Repeat ARQlcsh:QA76.75-76.765ARQApplication protocolIEEE 802.16 WiMAXElectrical and Electronic EngineeringbusinessBlock sizeIEEE 802.16 WiMAX; ARQ; NS-2SoftwareComputer networkData transmissionJournal of Communications Software and Systems
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Two-phase routing in three-dimensional blocked optical tori

2014

The contribution of this paper is an all-optical 3D network architecture. We describe scheduled, two-phase routing for it. The three-dimensional blocked optical torus BOT of block size b consists of b2 × b2 × b2 nodes for the first phase routing. Processors are evenly deployed at the underlying torus so that every bth node consists of a processor. Additionally, a BOT consists of b3 blocks of b × b × b subnetworks for the second phase routing. Routing of each packet is done in two phases. Firstly, packets are routed from source processor to an intermediate target node at the target block. Secondly, packets are routed from the intermediate targets at the target block to the target processor (…

ta113Dynamic Source Routingta213Computer sciencebusiness.industryNetwork packetNode (networking)ComputerSystemsOrganization_COMPUTER-COMMUNICATIONNETWORKSLink-state routing protocolDestination-Sequenced Distance Vector routingRouting (electronic design automation)businessBlock sizeComputer networkBlock (data storage)Proceedings of the 15th International Conference on Computer Systems and Technologies
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